Cristiano Calligaro received the laurea degree in Electronic Engineering and the Ph.D. degree in Electronics and Information Engineering from the University of Pavia (Italy) in 1992 and 1997 respectively. After obtaining the Ph.D. degree he moved to MAPP Technology. In 2006 he established RedCat Devices srl. During his career he was involved in memory design (volatile and non volatile) both for consumer application (multilevel flash memories) and space applications (rad-hard memories) and software design for SEE evaluation using free CAD tools (Open Circuit Design). His current research interest is focused on rad-hard libraries to be used for rad-hard mixed signal ASICs, stand-alone memories (SRAMs and NVMs) and testing methodologies for rad-hard components. He holds about 20 patents mainly in the field of multilevel NVMs and is co-author of about 30 papers. He has been coordinator of RAMSES and ATENA Project inside the Italy-Israel Cooperation Programme and SkyFlash Project inside the European FP7 Programme. In 2014 he co-founded BlueCat Energy as a spin-off company of University of Palermo and in 2017 he founded RCD Microelectronics in Hong Kong. He is IEEE member and Eureka Euripides reviewer.
Umberto Gatti received the Laurea degree (summa cum laude) in Electronic Engineering and the Ph.D. in Electronics and Information Engineering from the University of Pavia, Italy, in 1987 and 1992, respectively. From 1993 to 1999, he worked in the Central R&D Lab of Italtel, Italy, and then in the R&D Lab of Siemens, Italy, as Sr. ASIC Engineer. Besides developing analog and mixed analog-digital CMOS/BiCMOS ICs for telecom (data converters, base-band wireless transceivers, burst mode PON interfaces), he was the coordinator of funded projects under the frameworks of FP and Eureka, focused on high-speed Nyquist-rate and sigma-delta converters. In 2007 he joined Nokia Siemens Networks, Italy, where he was a Sr. Power Supply Architect for telecom equipment (both at rack and boards level). Currently he is with Redcat Devices, Italy, as Sr. Microelectronic Engineer and also holds cooperation with the University of Pavia in Hall sensors field. His current research interests are in the area of CMOS mixed-signal ICs, in particular in rad-hard digital libraries and memories (SRAMs), data converters and testing techniques under irradiations. He holds 2 international patents and is co-author of more than 60 papers. He is IEEE member from 1991. He served also as reviewer for IEEE magazines and conferences.
Roberto Gastaldi received the MS degree in Electronic Engineering from the Politecnico of Milano, Italy in 1977 and in the same year he joined the Central R&D department of SGS-ATES (later STMicroelectronics) as a device engineer. In 1981 he joined the non-volatile memory department starting to design eproms and first eeproms. From 1993 to 2000 he lead Eprom products development for many technology generations. In 1989 he started also to work on Flash-nor technology and products development as a member of technical staff. From 2000 to 2005 he worked on SRAM and DRAM design and breakthrough technologies evaluation, developing PCM memory architecture and circuit design. In 2005-2006 he co-designed in a JDP with Intel the first 128Mb PCM product in 90nm technology. From 2008 to 2010 he served as a manager of Advanced Design Team at Numonyx and from 2010 to 2014 he was with Micron Semiconductor Italy in the Emerging Memory Dept of central R&D where he worked on TRAM and STT-MRAM memory architecture development and explored novel sensing techniques and smart error correction engines for storage class memory applications. Since Feb.2015 he is collaborating with RedcatDevices S.r.l for rad-hard IP’s development. Mr. Gastaldi is co-author of many papers and conference contributions on topics related to NVM design and holds 50 US granted patents on memory design. He has been a member of the winner team of the “Innovator of the Year ” award for EDN-2009 and a lecturer on selected topics on Microelectronics at Pavia University (Italy). Mr. Gastaldi served as a member of ISSCC technical program memory subcommittee from 2009 to 2011 and co-chaired ISSCC2010 Non-volatile memory session in S. Francisco Feb.2010. He is a member of IEEE.