Rad-hard Standard Cells

RedCat Devices rad-hard libraries are designed to be used in digital ASICs for space applications. All cells can be placed by using standard tools such as Cadence or Tanner or free open source (FOS) tools like OpenROAD and Klayout.
All libraries have been designed using RCD proprietary EDA tool (RedGenesis) able to generate all deliverables required for a full digital ASIC design (GDS, LEF, liberty, verilog, spice netlist and datasheet).
Main fetarures are:

  • CMOS process (from 180nm down to 22nm)
  • FinFET process (16nm and 12nm)
  • Wide Temperature Range: -55 to +125°C
  • More than two hundred gate cells (including fillers, corners, taps, dcaps, etc…)
  • TID hardened up to 1 Mrad (Si)
  • SEL hardened up to 60 MeV*cm2/mg (Si)
  • SEU hardened FF up to 10 MeV*cm2/mg (Si)
  • Supported foundries: Tower, X-FAB, TSMC, UMC, IHP, SilTerra, DB HiTek

For additional info or quotation: info@redcatdevices.it

Standard Cells

CMOS 180nm
RadLibTS18SL. Rad-hard standard cell library (1.8V) for Tower Semiconductor ts18sl CMOS process (standard logic).
RadLibTS18IS. Rad-hard standard cell library (1.8V) for Tower Semiconductor ts18is CMOS process (imagers).
RadLibXH018. Rad-hard standard cell library (1.8V) for X-FAB xh018 CMOS process (standard logic).
RadLibXS018. Rad-hard standard cell library (1.8V) for X-FAB xs018 CMOS process (imagers).
RadLibXP018. Rad-hard standard cell library (1.8V) for X-FAB xp018 CMOS process (standard logic).
RadLibCM018. Rad-hard standard cell library (1.8V) for TSMC cm018 CMOS process (standard logic).
RadLibC18G. Rad-hard standard cell library (1.8V) for SilTerra c18g CMOS process (standard logic). (under development)
RadLibL018. Rad-hard standard cell library (1.8V) for UMC l18 CMOS process (standard logic).
RadLibTS33SL. Rad-hard standard cell library (3.3V) for Tower Semiconductor ts18sl CMOS process (standard logic).
RadLibXH033. Rad-hard standard cell library (3.3V) for X-FAB xh018 CMOS process (standard logic).
RadLibXS033. Rad-hard standard cell library (3.3V) for X-FAB xs018 CMOS process (imagers).
RadLibCM033. Rad-hard standard cell library (3.3V) for TSMC cm018 CMOS process (standard logic).
RadLibC18GH. Rad-hard standard cell library (3.3V) for SilTerra c18g CMOS process (standard logic). (under development)
CMOS 130nm
RadLibSG012. Rad-hard standard cell library (1.2V) for IHP sg13s CMOS process.
RadLib33I. Rad-hard standard cell library (3.3V) for IHP sg13s CMOS process.
RadLibCR013. Rad-hard standard cell library (1.2V) for TSMC cr013 CMOS process.
RadLibCR033. Rad-hard standard cell library (3.3V) for TSMC cr013 CMOS process.
CMOS 110nm
RadLibDB11. Rad-hard standard cell library (1.5V) for DB HiTek TS11SB CMOS process (imagers). (under development)
CMOS 65nm
RadLibN65GPS. Rad-hard standard cell library (1.0V) for for TSMC n65gp CMOS process (general purpose).
RadLibN65GPU. Rad-hard standard cell library (1.0V) for for TSMC n65gp CMOS process (general purpose) for Deep Space.
RadLibN65LPS. Rad-hard standard cell library (1.2V) for for TSMC n65lp CMOS process (low power).
RadLibN65LPU. Rad-hard standard cell library (1.2V) for for TSMC n65lp CMOS process (low power) for Deep Space.
RadLibL65SPS. Rad-hard standard cell library (1.1V) for for UMC l65sp CMOS process (standard process).
RadLibL65LLS. Rad-hard standard cell library (1.2V) for for UMC l65ll CMOS process (low leakage).
CMOS 40nm
RadLibN40LP. Rad-hard standard cell library (1.1V) for for TSMC n40lp CMOS process (low power).
CMOS 28nm
RadLibN28HPC. Rad-hard standard cell library (0.9V) for for TSMC N28HPC CMOS process.
CMOS 22nm
RadLibN22ULP. Rad-hard standard cell library (0.8V) for for TSMC N22ULP CMOS process.
RadLibN22ULL. Rad-hard standard cell library (0.8V) for for TSMC N22ULL CMOS process.
FinFET 16nm
RadLibN16FFC. Rad-hard standard cell library (0.8V) for TSMC N16FFC FinFET process.
FinFET 12nm
RadLibN12FFC. Rad-hard standard cell library (0.8V) for TSMC N12FFCLL FinFET process. (under development)
FinFET 7nm
RadLibN7FF. Rad-hard standard cell library (0.75V) for TSMC N7FF FinFET process. (under development)

  Library Supply Node Density (eq. NAND2) Process
1 RadLibTS18SL 1.8V 180nm 25 kgates/mm2 Tower (ts18sl)
2 RadLibTS18IS
 1.8V 180nm 25 kgates/mm2 Tower (ts18is)
3 RadLibXH018 1.8V 180nm 25 kgates/mm2 X-FAB (xh018)
4 RadLibXS018
 1.8V 180nm 25 kgates/mm2 X-FAB (xs018)
5 RadLibXP018 1.8V 180nm 25 kgates/mm2 X-FAB (xp018)
6 RadLibCM018 1.8V 180nm 25 kgates/mm2 TSMC (cm018)
7 RadLibC18G 1.8V 180m 25 kgates/mm2 SilTerra (c18g)
8 RadLibL018 1.8V 180nm 25 kgates/mm2 UMC (l18)
9 RadLibTS33SL 3.3V 180nm 19 kgates/mm2 Tower (ts18sl)
10 RadLibXH033 3.3V 180nm 19 kgates/mm2 X-FAB (xh018)
11 RadLibXS033
 3.3V 180nm 19 kgates/mm2 X-FAB (xs018)
12 RadLibCM033 3.3V 180nm 19 kgates/mm2 TSMC (cm018)
13 RadLibC18GH 3.3V 180m 19 kgates/mm2 SilTerra (c18g)
14 RadLibSG012 1.2V 130nm 40 kgates/mm2 IHP (sg13s)
15 RadLib33I 3.3V 130nm 28 kgates/mm2 IHP (sg13s)
16 RadLibCR013 1.2V 130nm 42 kgates/mm2 TSMC (cr013)
17 RadLibCR033 3.3V 130nm 27 kgates/mm2 TSMC (cr013)
18 RadLibDB11 1.5V 110nm 43 kgates/mm2 DBHiTek (ts11sb)
19 RadLibN65GPS 1V 65nm 173 kgates/mm2 TSMC (n65gp)
20 RadLibN65GPU
 1V 65nm 173 kgates/mm2 TSMC (n65gp)
21 RadLibN65LPS
 1.2V 65nm 173 kgates/mm2 TSMC (n65lp)
22 RadLibN65LPU
 1.2V 65nm 173 kgates/mm2 TSMC (n65lp)
23 RadLibL65SPS 1.1V 65nm 173 kgates/mm2 UMC (l65sp)
24 RadLibL65LLS 1.2V 65nm 173 kgates/mm2 UMC (l65ll)
25 RadLibN40LP 1.1V 40nm 333 kgates/mm2 TSMC (n40lp)
26 RadLibN28HPC 0.9V 28nm 525 kgates/mm2 TSMC (n28hpc+)
27 RadLibN22ULP 0.8V 22nm 577 kgates/mm2 TSMC (n22ulp)
28 RadLibN22ULL 0.8V 22nm 577 kgates/mm2 TSMC (n22ull)
29 RadLibN16FFC 0.8V 16nm 1.3 Mgates/mm2 TSMC (n16ffc)
30 RadLibN7FF 0.75V 8nm 2.6 Mgates/mm2 (TBC) TSMC (n7ff)

Rad-hard standard cell density calculated on the syntesis of a dual clock FIFO (512 address and 8 bits) in 180nm, 130nm, 65nm. 40nm and 28nm.

PseudoRAM using RadLibN65GPS (OpenROAD and Klayout views)

CPU6502 using RadLibN65GPS

SPI-SRAM using RadLibN65GPS and RadCompN65GP (1k x 8bits)

PseudoRAM using RadLibN7