Rad Hard 12 bits DAC



  • Single 12-Bit Synchronous DAC
  • Inherently monotonic curve
  • Operating Voltage: 1.2V and 3.3V±10%
  • Max sampling rate: 3MSPS
  • Low Power Consumption:
  1. Normal: 40 mW typical max (including pad)
  2. Power-down: 1.2 mW max (including pad)
  • CMOS digital inputs
  • Buffered/Unbuffered output
  • On-chip wide output range buffer (1÷2 Vpp)
  • Power-down control via PD pin
  • Asynchronous reset via RST pin
  • Indefinitely frozen out level via HOLD pin
  • Wide Temperature Range: -55 to +125°C
  • Radiation Hardened process and design:
  1. Total Dose 300 krad(Si) (Co60)
  2. SEL LETth > 60 MeV/mg*cm2 (Si) (Xe Ions)
  3. 4 < SEU LETth < 5 MeV cm2/mg (Si)
  • Packaging options:
  1. no package (waffle pack die)
  2. CERDIP (only for evaluation)


  • Space
  • Industrial


The RCRDAC12BRH is a low power 12-bit Digital-To-Analog converter that can be used with a typical sample rate of 1MSPS. A maximum sample rate of 3MSPS is admitted with a small performance degradation. It operates from two supply voltages (1.2V and 3.3V) for the DAC core and I/O with a total power consumption of 11mW.
The device incorporates an on-chip output buffer allowing even the choice between buffered and unbuffered DAC’s output.
A standard CMOS technology has been used to implement RCRDAC12BRH with a dedicated robust rad-hard by design (RHBD) approach using ELT transistors and enhanced guard rings.

RCRDAC12BRH has been specifically designed for applications with TID requirements in range of 100krad-300krad such as LEO, MEO and GEO.