Working in RCD means being part of a high skilled team spreading from IC design/layout/verification to electrical/irradiation testing. B.Sc./M.Sc. in electrical engineering or physics is mandatory, Ph.D. degree is welcome.
If you are interested in working with us and being part of our journey in the rad-hard components development send your CV to firstname.lastname@example.org mentioning one (or more) of the following codes:
JRCD-20-01: Memory Architect.
For internal NVM and SRAM development a memory architect position is available. Skills in Flash and emerging memories (ReRAM in particular) as well as SRAM (Single and Dual Ports) are required. Knowledge of both synchronous and asynchronous memories (including serial memories) is a must. Knowledge in physical design of large arrays and memory cell modeling is a plus.
Skills in commercial and open source EDA tools are required including layout design, simulation, verification, parasitic extraction and back-annotation. Familiarity with verilog/vhdl and abstract generation (including memory characterization) is a plus.
The candidate will report directly with CEO and CTO for development of new products both as stand-alone or embedded macro.
For this position a M.Sc. is required. Ph.D. is welcome.
JRCD-20-02: PDK Developer.
For internal PDK development using FOS (Free Open Source) EDA tools a software engineer position is available. Skills in standard cell physical verification and RAM compilers is required. Knowledge in xschem and klayout is welcome.
The candidate will report directly to CEO and CTO and will be in charge in the implementation of DRC and LVS rules using macro languages (Ruby, Perl and others) for CMOS technology nodes from 180nm down to 22nm.
For this position a B.Sc. is required. M.Sc. is welcome.